ISR (XPPU) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

ISR (XPPU) Register Description

Register NameISR
Relative Address0x0000000010
Absolute Address 0x00FF990010 (LPD_XPPU)
0x00F1310010 (PMC_XPPU)
0x00F1300010 (PMC_XPPU_NPI)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionAccess Violations Interrupt Status

If a Status bit is 1 and its Mask is 0, then the system IRQ interrupt signal is activated. The first AXI violation is recorded. Once an ISR[7:1] status bit is set, subsequent AXI violations are not recorded. ISR bits are cleared by a system reset and can be cleared by software by writing 1.

ISR (XPPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:8roRead-only0x0reserved
APER_PARITY 7wtcReadable, write a 1 to clear0x0Aperture Parity Error detected for an aperture entry fetched from local RAM.
0: no error.
1: error detected.
This parity checking is enable by setting CTRL [APER_PARITY_EN] = 1
APER_TZ 6wtcReadable, write a 1 to clear0x0TrustZone Violation; a non-secure transaction host attempted to access an aperture to a secure memory location.
0: no violation.
1: violation detected.
APER_PERM 5wtcReadable, write a 1 to clear0x0Access Violation. The transaction host is not allowed to access the transaction aperture based on SMID.
0: no violation.
1: violation detected.
Reserved 4roRead-only0x0reserved
SMID_PARITY 3wtcReadable, write a 1 to clear0x0SMID Parity Error. One of the SMID entries fetched from the local registers contained a parity error.
0: no error.
1: error detected.
This parity checking is enable by setting CTRL [MID_PARITY_EN] = 1.
Note: Field name reference: MID_PARITY
SMID_RO 2wtcReadable, write a 1 to clear0x0Read permission Violation. The transaction host attempted a write, but its SMID entry that is matching the request specifies read-only permission; SMID_xx [SMID_R] =1.
0: no violation.
1: violation detected.
This violation checking is enable by setting CTRL [ENABLE] = 1
Note: Field name reference: MID_RO
SMID_MISS 1wtcReadable, write a 1 to clear0x0System management ID (SMID) Not Found. The transaction's SMID, after masking is applied, doesn't match an SMID in the entry list.
0: no miss.
1: miss detected.
Note: Field name reference: MID_MISS
INV_APB 0wtcReadable, write a 1 to clear0x0Register Access Error on APB programming interface. Generated in two conditions:
1. A register access was requested to an unimplemented register location.
2. Non-secure APB transaction host accessing TZ
secure APB programming interface
The APB bus error signal is also asserted back to the interconnect.