SMMU_CBA2R12 (FPD_SMMU_TCU) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

SMMU_CBA2R12 (FPD_SMMU_TCU) Register Description

Register NameSMMU_CBA2R12
Relative Address0x0000001830
Absolute Address 0x00FD801830 (FPD_SMMU_TCU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionExtends the configuration attributes for the translation context bank that SMMU_CBARn specifies.

SMMU_CBA2R12 (FPD_SMMU_TCU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
MONC 1rwNormal read/write0x0Extends the configuration attributes for the translation context bank that SMMU_CBARn specifies.
VA64 0rwNormal read/write0x0Extends the configuration attributes for the translation context bank that SMMU_CBARn specifies.