AER_CAP_PERMIT_ROOTERR_UPDATE (CPM5_PCIE_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

AER_CAP_PERMIT_ROOTERR_UPDATE (CPM5_PCIE_ATTR) Register Description

Register NameAER_CAP_PERMIT_ROOTERR_UPDATE
Relative Address0x0000001330
Absolute Address 0x00FCE09330 (CPM5_PCIE0_ATTR)
0x00FCE89330 (CPM5_PCIE1_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionWhen TRUE, enables updates for Root AER registers Root Error Status and Error Source ID.
When FALSE, disables updates to the Root AER registers Root Error Status and Error Source ID.
When FALSE, disables these register updates.

This register should only be written to during reset of the PCIe block

AER_CAP_PERMIT_ROOTERR_UPDATE (CPM5_PCIE_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0When TRUE, enables updates for Root AER registers Root Error Status and Error Source ID.
When FALSE, disables updates to the Root AER registers Root Error Status and Error Source ID.
When FALSE, disables these register updates.