PF0_DEV_CAP2_32B_ATOMIC_COMPLETER_SUPPORT (CPM4_PCIE1_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)
Document ID
AM012
Release Date
2023-08-29
Revision
1.3

PF0_DEV_CAP2_32B_ATOMIC_COMPLETER_SUPPORT (CPM4_PCIE1_ATTR) Register Description

Register NamePF0_DEV_CAP2_32B_ATOMIC_COMPLETER_SUPPORT
Relative Address0x00000005CC
Absolute Address 0x00FCA605CC (CPM4_PCIE1_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
Description32-bit AtomicOp Completer Supported: if TRUE sets Bit 7, includes FetchAdd, Swap, and CAS AtomicOps optional capability.

This register should only be written to during reset of the PCIe block

PF0_DEV_CAP2_32B_ATOMIC_COMPLETER_SUPPORT (CPM4_PCIE1_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x032-bit AtomicOp Completer Supported: if TRUE sets Bit 7, includes FetchAdd, Swap, and CAS AtomicOps optional capability.