IMR (XPPU) Register Description
Register Name | IMR |
---|---|
Relative Address | 0x0000000014 |
Absolute Address |
0x00FF990014 (LPD_XPPU) 0x00F1310014 (PMC_XPPU) 0x00F1300014 (PMC_XPPU_NPI) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x000000EF |
Description | Access Violations Interrupt Mask |
0: enabled. 1: masked (disabled). Note: If the ISR bit = 1 (asserted interrupt) and the IMR bit = 0 (not masked), then the system IRQ to the interrupt controller is asserted. Software checks the ISR to determine the cause of the interrupt. Read-only.
IMR (XPPU) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:8 | roRead-only | 0x0 | reserved |
APER_PARITY | 7 | roRead-only | 0x1 | Parity Error mask status |
APER_TZ | 6 | roRead-only | 0x1 | TrustZone Violation mask status. |
APER_PERM | 5 | roRead-only | 0x1 | Access Violation mask status. |
Reserved | 4 | roRead-only | 0x0 | reserved |
SMID_PARITY | 3 | roRead-only | 0x1 | SMID Parity Error mask status. Note: Field name reference: MID_PARITY |
SMID_RO | 2 | roRead-only | 0x1 | Read permission Violation mask status. Note: Field name reference: MID_RO |
SMID_MISS | 1 | roRead-only | 0x1 | System management (SMID) Not Found mask status. Note: Field name reference: MID_MISS |
INV_APB | 0 | roRead-only | 0x1 | Register Access Error on APB mask status. |