Spec_Addr4_L (GEM) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

Spec_Addr4_L (GEM) Register Description

Register NameSpec_Addr4_L
Relative Address0x00000000A0
Absolute Address 0x00FF0C00A0 (GEM0)
0x00FF0D00A0 (GEM1)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionSpecific Address 4 Lower 31:0

The addresses are activated when specific address register top is written. Note: The deactivated at reset or when their corresponding specific address bottom register is written. Alternate register name: spec_add4_bottom

Spec_Addr4_L (GEM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
address31:0rwNormal read/write0x0Least significant 32 bits of the destination address, that is bits 31:0. Bit zero indicates whether the address is multicast or unicast and corresponds to the least significant bit of the first byte received.