attr_dma_axibar_base_1_l (CPM5_DMA_ATTR) Register Description
| Register Name | attr_dma_axibar_base_1_l |
|---|---|
| Relative Address | 0x00000001B0 |
| Absolute Address |
0x00FCE101B0 (CPM5_DMA0_ATTR) 0x00FCE901B0 (CPM5_DMA1_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | AXI to PCIe bar base |
This register should only be written to during reset of the PCIe block
attr_dma_axibar_base_1_l (CPM5_DMA_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr | 31:0 | rwNormal read/write | 0x0 | AXI to PCIe bar base |