AXISTEN_IF_SIM_SHORT_CPL_TIMEOUT (CPM4_PCIE1_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

AXISTEN_IF_SIM_SHORT_CPL_TIMEOUT (CPM4_PCIE1_ATTR) Register Description

Register NameAXISTEN_IF_SIM_SHORT_CPL_TIMEOUT
Relative Address0x00000000A8
Absolute Address 0x00FCA600A8 (CPM4_PCIE1_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionAXI Stream Enhanced Interface Simulation Short Completion Timeout: When TRUE, Non Posted Completion Timeouts are scaled down by a factor of ~1000.

This register should only be written to during reset of the PCIe block

AXISTEN_IF_SIM_SHORT_CPL_TIMEOUT (CPM4_PCIE1_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0AXI Stream Enhanced Interface Simulation Short Completion Timeout: When TRUE, Non Posted Completion Timeouts are scaled down by a factor of ~1000.