DBGDTRRX_EL0 (DBG_A720_DBG) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

DBGDTRRX_EL0 (DBG_A720_DBG) Register Description

Register NameDBGDTRRX_EL0
Relative Address0x0000000080
Absolute Address 0x00F0D00080 (DBG_APU0_DBG)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionDebug Data Transfer Register Receive

DBGDTRRX_EL0 (DBG_A720_DBG) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
DTRRX31:0rwNormal read/write0x0Update DTRRX.
Writes to this register update the value in DTRRX and set RXfull to 1. Reads of this register return the last value written to DTRRX and do not change RXfull.