SMMU_CB6_PMCFGR (FPD_SMMU_TCU) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID: AM012
Release Date: 2023-08-29
Revision: 1.3

SMMU_CB6_PMCFGR (FPD_SMMU_TCU) Register Description

Register Name	SMMU_CB6_PMCFGR
Relative Address	0x0000026F00
Absolute Address	0x00FD826F00 (FPD_SMMU_TCU)
Width	32
Type	roRead-only
Reset Value	0x00011F03
Description	Provides a performance monitoring configuration register in the register map of a translation context bank. Provides Performance Monitoring Unit (PMU) configuration data.

SMMU_CB6_PMCFGR (FPD_SMMU_TCU) Register Bit-Field Summary

Field Name	Bits	Type	Reset Value	Description
NCG	31:24	roRead-only	0x0	Provides a performance monitoring configuration register in the register map of a translation context bank. Provides Performance Monitoring Unit (PMU) configuration data.
UEN	19	roRead-only	0x0	Provides a performance monitoring configuration register in the register map of a translation context bank. Provides Performance Monitoring Unit (PMU) configuration data.
EX	16	roRead-only	0x1	Provides a performance monitoring configuration register in the register map of a translation context bank. Provides Performance Monitoring Unit (PMU) configuration data.
CCD	15	roRead-only	0x0	Provides a performance monitoring configuration register in the register map of a translation context bank. Provides Performance Monitoring Unit (PMU) configuration data.
CC	14	roRead-only	0x0	Provides a performance monitoring configuration register in the register map of a translation context bank. Provides Performance Monitoring Unit (PMU) configuration data.
SIZE	13:8	roRead-only	0x1F	Provides a performance monitoring configuration register in the register map of a translation context bank. Provides Performance Monitoring Unit (PMU) configuration data.
N	7:0	roRead-only	0x3	Provides a performance monitoring configuration register in the register map of a translation context bank. Provides Performance Monitoring Unit (PMU) configuration data.