RST_L2_0 (CPM4_CRX) Register Description
Register Name | RST_L2_0 |
---|---|
Relative Address | 0x0000000318 |
Absolute Address | 0x00FCA00318 (CPM4_CRX) |
Width | 1 |
Type | rwNormal read/write |
Reset Value | 0x00000001 |
Description | Reset for L2 block (includes CHI RegSlice and interrupt synchronization) |
This reset must be released even if CHI interface is used with L2 bypassed.
RST_L2_0 (CPM4_CRX) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
RESET | 0 | rwNormal read/write | 0x1 | block will be reset when asserted 1 |