The following table lists the eMMC I/O interface signals. For boot pin planning, see MIO Boot Interfaces. The eMMC MIO signals are also listed in the first PMC MIO signal table in the MIO Boot Interfaces. The eMMC I/O interface is available on the PMC MIO pins and on the PL EMIO port signals. All modes might not be supported for the PL EMIO interface.
The following table lists the eMMC interface signals. The MIO pin number assignments are shown in the MIO-at-a-Glance Tables.
| Signal Name | Description | MIO | EMIO | ||
|---|---|---|---|---|---|
| MIO-at-a-Glance Table | I/O | Signal Port Name | I/O | ||
| EMMC_CLK | Clock output | CLK | O | ||
| EMMC_CMD | Command | CMD | O | ||
| EMMC_DATA[0] | Data I/O pin for 1-bit, 4-bit, and 8-bit data interfaces | D [0] | I/O | ||
| EMMC_DATA[3:1] | Data I/O pins for 4-bit, 8-bit data interfaces | D [3:1] | I/O | ||
| EMMC_DATA[7:4] | Data I/O pins for 8-bit data interface | D [7:4] | I/O | ||
| EMMC_RST | Reset output that resets the flash device | RST | O | ||