FPD SMMU and Coherent Implementations

Versal Adaptive SoC Technical Reference Manual (AM011)

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1.6 English

The following table lists the FPD SMMU and coherent implementations.

Table 1. FPD SMMU and Coherent Interconnect Implementations
Device Generation System MMU FPD Coherent Interconnect
UltraScale+ MPSoC SMMU-500 is in both the Zynq UltraScale+ MPSoC and the Versal adaptive SoC ACP, ACE
Versal adaptive SoC Arm SMMU-500

TCU version is r2p4

TBU version is r2p1

Cache coherent interconnect, CCI-500 with single L2-cache

Version PL422-r1p0-00rel0