QSPI Flash Interface Signals

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The flash memory interface is only available on the PMC MIO pins. The interface is not available on the LPD MIO pins or the PL EMIO port.

The following tables list the QSPI controller signals. The interface includes lower and upper controls, QSPI0 and QSPI1, respectively. The controller always drives the interface clock and chip select signals as an outputs.

QSPI 4-bit and 8-bit Interfaces

The five MIO connection options are shown in QSPI Flash Interface Diagrams and are listed in the following table.

Note: When required, the loopback clock signal is routed from the controller through the output buffer to the pin and returned back through the pin's input buffer to the controller for I/O delay compensation. The loopback clock signal is used by both interfaces.
Table 1. QSPI Interface Signals
Interface Signal Name MIO-at-a-Glance Table Signal Name Flash Signals
Single 4-bit I/O Dual-Stacked 4-bit I/O Dual-Parallel 8-bit I/O
Lower Device Only Lower Device Upper Device Lower and Upper Devices
Lower Interface
QSPI0_CLK CLK0 Clock CLK CLK- CLK
QSPI0_CS_b CS0 CS_b CS_b - CS_b
QSPI0_IO[0] IO0 0 I/O 0 I/O 0 I/O 0 I/O 0
QSPI0_IO[1] IO0 1 I/O 1 I/O 1 I/O 1 I/O 1
QSPI0_IO[2] IO0 2 I/O 2 I/O 2 I/O 2 I/O 2
QSPI0_IO[3] IO0 3 I/O 3 I/O 3 I/O 3 I/O 3
Upper Interface
QSPI1_CLK CLK1 - - - CLK
QSPI1_CS_b CS1 - - CS_b CS_b
QSPI1_IO[0] IO1 0 - - - I/O 4
QSPI1_IO[1] IO1 1 - - - I/O 5
QSPI1_IO[2] IO1 2 - - - I/O 6
QSPI1_IO[3] IO1 3 - - - I/O 7
Loopback Clock
QSPI_LPBK_CLK LPBK Required for clock frequencies >37.5 MHz (the pin is a no-connect on the PCB)

QSPI 1-bit and 2-bit Interface Signals

Table 2. QSPI Flash 1-bit and 2-bit Interface Signals
Signal Name MIO-at-a-Glance Table Signal Name Flash Interface Protocols
1-bit 2-bit
I/O Name I/O Name

Lower QSPI Interface

QSPI0_CLK

CLK O CLK O CLK

QSPI0_CS_b

CS0 O CS_b O CS_b

QSPI0_IO[0]

IO0 0 O MOSI I/O I/O 0

QSPI0_IO[1]

IO0 1 I MISO I/O I/O 1

QSPI0_IO[2]

IO0 2 O WP_b O WP_b

QSPI0_IO[3]

IO0 3 O HOLD_b O HOLD_b
Loopback Clock
QSPI_LPBK_CLK LPBK For clock frequencies >37.5 MHz (no-connect on PCB)