System Timestamp

Versal Adaptive SoC Technical Reference Manual (AM011)

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1.6 English

The system timestamp is used by software to acquire a time stamp that is accessible to all processors.

The counter is clocked by the TS_REF_CLK from the LPD clock controller. This reference clock is controlled by the TIMESTAMP_REF_CTRL register.

System Register Access

There is one system clock in the device. The APU can access the time count using a CPU local register. The other processors access the LPD_SCNTR register module. The system counter is physically located in the LPD.

The count value is accessible using memory-mapped registers in the LPD memory space and by local registers in the APU cores. All registers access the same value from system counter in the LPD.

The register modules include:

  • LPD_SCNTR (read-only)
  • LPD_SCNTRS (read/write by a secure transaction)

Local Register Access

Software can access the local processor counter registers in the v8 architecture.

  • Enabling and disabling the counter using CNTCR [EN] bit:
    • 0: disabled
    • 1: enabled
  • Match the tick count in CNTFRQ register to the to TS_REF_CLK frequency
  • Set the counter value:
    • Two contiguous RW registers CNTCV [31:0] and CNTCV [63:32] hold the current count
    • Writing to CNTCV [63:32] starts the counting
  • Enable halt-on-debug for a debugger to use to suspend counting. Use CNTCR [HDBG] bit [1]:
    • 0: system counter ignores halt-on-debug signal
    • 1: halt-on-debug signal halts system counter update
  • Changing the operating mode to change the update frequency and increment value
  • CNTCR, counter control register FCREQ, bits [17:8]: frequency change request

Processor Virtual Counters

The processor's virtual counters are derived from the system counter. The virtual counter is a count subtracted from the system count. Each virtual world can have their own counter value. The single physical system counter drives multiple virtual counters.