Message Buffer

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID

AM011

Release Date

2023-10-05

Revision

1.6 English

The IPI message buffer address map is shown in the following table.

Note: The base address for message buffers is 0xFF3F_0000.

Table 1. IPI Message Buffer Address Map
Offset Address	Buffer Type	Size	Source Agent		Destination Agent
Offset Address	Buffer Type	Size	Name	Access Type	Name	Access Type
`0x000` to `0x01FF`	Request	32B	PSM	RW	PSM	RW
	Response	32B		RW	PSM	RW
	Request	32B		RW	PMC	R
	Response	32B		R	PMC	RW
	Request	32B		RW	IPI 0	R
	Response	32B		R	IPI 0	RW
	Request	32B		RW	IPI 1	R
	Response	32B		R	IPI 1	RW
	Request	32B		RW	IPI 2	R
	Response	32B		R	IPI 2	RW
	Request	32B		RW	IPI 3	R
	Response	32B		R	IPI 3	RW
	Request	32B		RW	IPI 4	R
	Response	32B		R	IPI 4	RW
	Request	32B		RW	IPI 5	R
	Response	32B		R	IPI 5	RW
`0x0200` to `0x03FF`	Requests and Responses	512B	PMC	RW, R	PSM, PMC, IPI0, IPI1, IPI2, IPI3, IPI4, IPI5	RW, R
`0x0400` to `0x05FF`	"	512B	IPI 0	RW, R	"	RW, R
`0x0600` to `0x07FF`	"	512B	IPI 1	RW, R	"	RW, R
`0x0800` to `0x09FF`	"	512B	IPI 2	RW, R	"	RW, R
`0x0A00` to `0x0BFF`	"	512B	IPI 3	RW, R	"	RW, R
`0x0C00` to `0x0DFF`	"	512B	IPI 4	RW, R	"	RW, R
`0x0E00` to `0x0FFF`	"	512B	IPI 5	RW, R	"	RW, R