The BootROM begins the hardware boot by configuring hardware and accessing the boot header in the boot device. As the BootROM code executes, it might detect errors and generate error codes.
The RCU detects uncorrectable errors during the hardware boot phase and during system monitoring. Each error is assigned a 12-bit BootROM error code as listed in the following table. In some cases, multiple errors are grouped to the same error code. These non-fatal errors allow the BootROM to continue execution. The first and last BootROM error codes are saved and accessible to software and the JTAG interface.
The BootROM first error code is written to:
- JTAG error status register, ERROR_STATUS [147:136], and
- PMC_GLOBAL memory-mapped register, PMC_BOOT_ERR [FEC, 23:12]
The BootROM last error code is written to:
- JTAG error status register, ERROR_STATUS [135:124], and
- PMC_GLOBAL memory-mapped register, PMC_BOOT_ERR [LEC, 11:0]
Note: The [LEC] bit
field is overwritten when there is more than one error detected after the first
error. In this case, the [LEC] is overwritten and always shows the error code that
was last detected.
The JTAG error status register is shown in the ERROR_STATUS Register section.
Note: After the RCU executes
the BootROM, it releases the PPU to execute the platform loader and manager (PLM)
firmware. The PPU PLM firmware also reports error codes. These PLM error codes are
listed in the
Versal
Adaptive SoC System Software Developers Guide (UG1304). The
BootROM error codes and the PLM error codes have similar numbering, but they are
completely
separate. See
the pdi_dbg_util in
Vivado Design Suite User Guide:
Programming and Debugging (UG908) for
decoding and analyzing BootROM error codes.
| Error Code | Description | Next Step |
|---|---|---|
0x100
|
eFUSE timeout error | Verify on alternate system, see note 1. |
0x101
|
eFUSE cache parity error | Verify on alternate system, see note 1. |
0x104
|
PMC MBIST timeout error | Verify on alternate system, see note 1. |
0x105
|
PMC MBIST error | Verify on alternate system, see note 1. |
0x107
|
PMC PLL (PPLL) lock failed | System might not be operating with the REF_CLK. |
0x108
|
NoC PLL (NPLL) lock failed | |
0x109
|
NoC scan clear failed | |
0x10B
|
PMC BISR timeout error | Verify on alternate system, see note 1. |
0x10C
|
PMC BISR error | Verify on alternate system, see note 1. |
0x10F
|
Error occurred in BootROM | Verify on alternate system, see note 1. |
0x110
|
Error occurred in RCU ROM | Verify on alternate system, see note 1. |
0x111
|
Error occurred in BootROM | Verify on alternate system, see note 1. |
0x114
|
PMC MBIST error | Verify on alternate system, see note 1. |
0x115
|
PMC BISR error | Verify on alternate system, see note 1. |
0x116
|
VCC_SOC is not available | Check that the VCC_SOC rail voltage level is within the data sheet specification. |
0x117
|
Unable to remove PMC to SoC_NPI isolation | Verify on alternate system, see note 1. |
0x118
|
Unable to remove PMC to SoC isolation | Verify on alternate system, see note 1. |
0x11C
|
Soft reset check, isolation is not removed between PMC and NPI | |
0x11D
|
Soft reset check, NoC power supply is not available | |
0x11E
|
Soft reset check, isolation is not removed between PMC and NoC | |
0x203
|
Secure boot not allowed in non-secure boot modes | If PPK HASH is written, ensure JTAG boot mode is not set. |
0x204
|
Invalid boot mode read from BOOT_MODE_USER register | Ensure the boot mode pins are set properly for the requested boot mode. |
0x205
|
Image search error | See first error. The image search cannot be done for supervised boot modes. |
0x206
|
Image/width in QSPI24 boot mode not detected | BootROM unable to initialize QSPI flash. Check boot mode pins, interface connections, and PDI options used. |
0x207
|
Image/width in QSPI32 boot mode not detected | BootROM unable to initialize QSPI flash. Check boot mode pins, interface connections, and PDI options. |
0x208
|
Invalid boot mode selected | Ensure the boot mode pin settings are set to a valid option. |
0x209
|
eMMC FAT file system boot initialization error | BootROM unable to initialize eMMC flash. Possible file system error. Check boot mode pins, interface connections, and PDI options. Ensure the eMMC is properly formatted and partitioned. |
0x20A
|
OSPI initialization error | BootROM unable to initialize OSPI flash. Valid image not found. Check boot mode pins, interface connections, and PDI options. |
0x20B
|
SelectMAP initialization error | BootROM unable to initialize SelectMAP. Valid image not found. Check boot mode pins, interface connections, and PDI options |
0x20C
|
JTAG initialization failed | BootROM unable to initialize JTAG boot. Valid image not found. Check boot mode pins, interface connections, and PDI options. |
0x20E
|
PPU RAM initialization error, DMA timeout | Verify on alternate system, see note 1. |
0x20F
|
PMC RAM initialization error, DMA timeout | Verify on alternate system, see note 1. |
0x211
|
PMC DMA0 or DMA1 error | Verify on alternate system, see note 1. |
0x213
|
SD0(3.0) FAT file system boot initialization error | BootROM unable to initialize SD flash. Possible file system error. |
0x214
|
SD1(2.0) FAT file system boot initialization error | BootROM unable to initialize SD flash. Possible file system error. |
0x215
|
SD1(3.0) FAT file system boot initialization error | BootROM unable to initialize SD flash. Possible file system error. |
0x21D
|
OSPI is not indicating idle during read operation | |
0x21E
|
Number of bytes to read are zero, which is not valid | |
0x21F
|
OSPI command execution error during read operation | |
0x220
|
OSPI DMA read timeout error | |
0x221
|
SelectMAP boot mode mismatch | Check boot mode used for PDI creation. BootROM is initializing to SelectMAP but SelectMAP boot mode is not set in the register. |
0x222
|
JTAG boot mode mismatch | Check boot mode used for PDI creation. BootROM is initializing to JTAG boot mode but JTAG boot mode is not seen in the register. |
0x228
|
QSPI24 MultiBoot value is beyond the boot limit | Check that the MultiBoot value is within the search limits listed in the Autonomous Boot Mode Search Limit table. |
0x229
|
QSPI32 MultiBoot value is beyond the boot limit | Check that the MultiBoot value is within the search limits listed in the Autonomous Boot Mode Search Limit table. |
0x22A
|
OSPI MultiBoot value is beyond the boot limit | Check that the MultiBoot value is within the search limits listed in the Autonomous Boot Mode Search Limit table. |
0x22B
|
SD initialization error | BootROM unable to initialize SD boot. Valid image not found. Check boot mode pins, interface connections, and PDI options. |
0x22C
|
OSPI configuration error | BootROM unable to initialize OSPI boot. Valid image not found. Check boot mode pins, interface connections, and PDI options. |
0x22D
|
OSPI time out occurred when reading the PDI identification wordCheck flash connectivity and PDI generation settings. | Check flash connectivity and PDI generation settings. |
0x22E
|
OSPI PDI identification word not matched | |
0x22F
|
OSPI time out occurred when reading the PDI | Check flash connectivity, including the reset and ensure flash is not in a non-responsive state. |
0x230
|
OSPI time out occurred when reading the PDI | Check flash connectivity, including the reset and ensure flash is not in a non-responsive state. |
0x231
|
OSPI configuration error | BootROM unable to initialize OSPI boot. Valid image not found. Check boot mode pins, interface connections, and PDI options. |
0x232
|
OSPI timeout occurred when reading the PDI identification word | Check flash connectivity and PDI generation settings. |
0x233
|
OSPI PDI identification word not matched | Check flash connectivity and PDI generation settings. |
0x234
|
OSPI timeout occurred when reading the PDI | Check flash connectivity, including the reset and ensure flash is not in a non-responsive state. |
0x235
|
OSPI timeout occurred when reading the PDI | Check flash connectivity, including the reset and ensure flash is not in a non-responsive state. |
0x300
|
Boot header does not have a XLNX signature | Ensure the image identification
contains XLNX (0x584c4e58). Check
PDI settings. JTAG boot mode test. |
0x301
|
JTAG boot mode cannot be used for asymmetrically authenticated image | Check the PDI image boot mode to ensure a valid secure boot mode is selected. |
0x302
|
JTAG boot mode cannot be used for asymmetrically authenticated image | Check the PDI image boot mode to ensure a valid secure boot mode is selected. |
0x303
|
eFUSE and boot header authentication enabled | Rebuild the image and select only eFUSE authentication or boot header authentication. |
0x305
|
Boot image integrity check when authentication/encryption enabled error | Rebuild the image and select either the integrity check or authentication/encryption. |
0x306
|
Key source provided in boot image is not valid | Rebuild the image with a valid encryption key source. |
0x307
|
SD/eMMC read error | Check flash connectivity, including the reset and ensure flash is not in a non-responsive state. |
0x308
|
eFUSE key not selected for S-HWRoT boot mode | Rebuild the image and select the eFUSE key. |
0x309
|
Boot header source offset is overlapping with boot header | |
0x30A
|
Data partition or total data partition length is crossing the permissible limit of 112 KB | |
0x30B
|
Data partition or total data partition length is crossing the permissible limit of 384 KB | |
0x30C
|
Boot header image identification does not match in SD/eMMC boot mode | Ensure the PDI boot header image
identification contains XLNX (0x584c4e58). Check PDI settings. JTAG boot mode test.
|
0x30D
|
Image search not supported for supervised boot modes | MultiBoot is only supported for QSPI, OSPI, SD, and eMMC. Use a valid boot medium for MultiBoot. |
0x30E
|
No image found in QSPI flash after searching the supported address range | Ensure the PDI is programmed at the correct address in the flash and is within the search limits listed in the Autonomous Boot Mode Search Limit table. |
0x30F
|
No image found in OSPI flash after searching the supported address range | Ensure the PDI is programmed at the correct address in the flash and is within the search limits listed in the Autonomous Boot Mode Search Limit table. |
0x310
|
No image found in SD/eMMC flash after searching the supported address range | Check flash connectivity and PDIEnsure the PDI is programmed at the correct address in the flash and is within the search limits listed in the Autonomous Boot Mode Search Limit table. |
0x311
|
Device read failed during the certificate read | Verify on alternate system, see note 1. |
0x312
|
Boot not allowed because all PPK revoked through eFUSE | Versal adaptive SoC is no longer bootable. |
0x313
|
Boot not allowed because all SPK revoked through eFUSE | Versal adaptive SoC is no longer bootable. |
0x314
|
Invalid PPK | Rebuild the image using a valid PPK value. 1 |
0x315
|
Boot not allowed because chosen PPK is revoked through eFUSE | Rebuild the image using a non-revoked/valid PPK. 1 |
0x316
|
Invalid SPK | Rebuild the image using a valid SPK value. 1 |
0x317
|
Boot not allowed because chosen SPK is revoked through eFUSE | Rebuild the image using a non-revoked/valid SPK. 1 |
0x318
|
PPK hash does not match any of the eFUSE locations | Rebuild the image using a valid PPK value. 1 |
0x319
|
PLM length error | |
0x31A
|
Boot header authentication error | Rebuild the image and verify a valid PPK value is used. 1 |
0x31D
|
PUF helper from boot header is not allowed when using S-HWRoT mode | Rebuild the image to use the PUF helper data in eFUSEs. |
0x31E
|
DPA counter measure enabled in boot header and disabled through eFUSE mismatch or DPA counter measure disabled in boot header and enabled through eFUSE mismatch. | Rebuild the image with the appropriate DPA counter measures attribute. |
0x31F
|
PMC firmware length is not 4-byte aligned | |
0x320
|
Key source changed from the previous to current image and asymmetric authentication is not enabled | |
0x321
|
Data partition length is not 4-byte aligned | |
0x322
|
Authentication status changed between previous and current image. Boot not allowed | |
0x323
|
Source offset of PLM in image is not 4-byte aligned | |
0x324
|
Data partition load address in PMC RAM is not 16-byte aligned | |
0x325
|
Total data partition length is not 4-byte aligned | |
0x326
|
Total PLM length is not 4-byte aligned | |
0x327
|
Voltage glitch detected | Verify voltage sources to the part/board are stable. Reboot the device and try again. |
0x328
|
PPK hash in eFUSEs is all zeroes | Provision the device with a valid PPK or select another PPK that has been already provisioned. |
0x329
|
Error occurred reading the authentication certificate from flash | Verify on alternate system, see note 1. |
0x32A
|
Timeout occurred during SHA3 calculation for the authentication header | Verify on alternate system, see note 1. |
0x32B
|
Timeout occurred during SHA3 calculation for SPK | Verify on alternate system, see note 1. |
0x32C
|
RSA signature verification failure | Verify on alternate system, see note 1. |
0x32D
|
Timeout occurred during SHA3 calculation using DMA | Verify on alternate system, see note 1. |
0x32E
|
Hash of BH timeout error | Verify on alternate system, see note 1. |
0x32F
|
Timeout error occurred while calculating SHA3 using DMA | Verify on alternate system, see note 1. |
0x330
|
Hash of PPK timeout error | Verify on alternate system, see note 1. |
0x336
|
OSPI device not showing idle status after completion of read operation | |
0x337
|
OSPI idle check error before triggering DMA operation | |
0x338
|
OSPI idle check error after the DMA operation | |
0x339
|
Image header copy operation error | Verify on alternate system, see note 1. |
0x33A
|
RSA operation timeout error | Verify on alternate system, see note 1. |
0x33B
|
RSA operation status error | Verify on alternate system, see note 1. |
0x33C
|
RSA signature verification failure | Rebuild the image and verify the correct RSA key was used to build the image. |
0x33D
|
RSA signature verification failure | Rebuild the image and verify the correct RSA key was used to build to image. |
0x33E
|
ECDSA key is not valid | Rebuild the image and verify the correct ECDSA key was used to build to image. |
0x33F
|
ECDSA signature verification error | Rebuild the image and verify the correct ECDSA key was used to build to image. |
0x340
|
QSPI DMA read operation timeout error | |
0x341
|
QSPI DMA read operation timeout error | |
0x342
|
QSPI DMA read operation timeout error | |
0x343
|
Data not received from host before timeout | |
0x344
|
SelectMAP abort sequence detected | Check the SelectMAP sequence topic. If the SMAP_RDWR_B is transitioning when CS is asserted, this error is set. |
0x345
|
Boot header PLM length is greater than the total PLM length | |
0x346
|
Total PLM length is less than the authentication certificate size | |
0x347
|
Data partition load address is not within PMC RAM limit | |
0x348
|
Requested data partition cannot fit in PMC RAM | |
0x349
|
Total data partition length is less than data partition length | |
0x34A
|
Total data partition or data partition length mismatch | |
0x34B
|
Source offset of PLM in flash is beyond search limit | |
0x34C
|
Total data partition length does not match data partition length when authentication/encryption/integrity is enabled | |
0x34D
|
JTAG boot timeout error | Check the JTAG interface connections and ensure the host is driving the interface, see the JTAG Boot Mode topic. |
0x34E
|
DMA timeout error during SHA3 KAT operation | Verify on alternate system, see note 1. |
0x34F
|
Calculation timeout error during SHA3 KAT operation | Verify on alternate system, see note 1. |
0x350
|
KAT error during SHA3 operation | Verify on alternate system, see note 1. |
0x351
|
Key validation failed during KAT operation | Verify on alternate system, see note 1. |
0x352
|
KAT error during ECDSA operation | Verify on alternate system, see note 1. |
0x353
|
KAT error during RSA operation | Verify on alternate system, see note 1. |
0x354
|
HASH mismatch during RSA KAT operation | Verify on alternate system, see note 1. |
0x35D
|
RSA Authentication error | Rebuild the image and verify the RSA key |
0x35E
|
RSA authentication error | Rebuild the image and verify the RSA key |
0x35F
|
RSA authentication error | Rebuild the image and verify the RSA key |
0x360
|
ECDSA authentication error | Rebuild the image and verify the ECDSA key |
0x361
|
ECDSA authentication error | Rebuild the image and verify the ECDSA key |
0x362
|
ECDSA authentication error | Rebuild the image and verify the ECDSA key |
0x363
|
ECDSA authentication error | Rebuild the image and verify the ECDSA key |
0x400
|
Invalid address for register initialization | |
0x401
|
Device read error after register initialization | |
0x402
|
Boot header does not match original after register initialization | |
0x403
|
Register initialization disabled through eFUSE | |
0x504
|
Boot image integrity error | Verify on alternate system, see note 1. |
0x505
|
Block size to be decrypted is not 128-bit aligned | |
0x506
|
Timeout error occurred before AES engine key load completed | Verify on alternate system, see note 1. |
0x507
|
Timeout error occurred during AES operation completed | Verify on alternate system, see note 1. |
0x508
|
DMA done not asserted after pushing the IV to AES engine with in timeout | Verify on alternate system, see note 1. |
0x509
|
DMA done not asserted after pushing the data to AES engine with in timeout | Verify on alternate system, see note 1. |
0x50A
|
DMA done not asserted after pushing the secure header to AES engine with in timeout | Verify on alternate system, see note 1. |
0x50B
|
DMA done not asserted after pushing the GCM tag to AES engine with in timeout | Verify on alternate system, see note 1. |
0x50C
|
DMA done not asserted after pushing the KEK to AES engine with in timeout | Verify on alternate system, see note 1. |
0x50D
|
Decrypted length does not match total image length specified in the boot header | Rebuild the image and try booting again. 1 |
0x50E
|
Total decrypted length is greater than image size specified in the boot header | Rebuild the image and try booting again. 1 |
0x50F
|
GCM tag does not match for PLM decryption operation | Rebuild the image and try booting again. 1 |
0x510
|
GCM tag does not match for data partition decryption operation | Rebuild the image and try booting again. 1 |
0x511
|
Invalid key source | Rebuild the image and verify a valid key source is being used. |
0x512
|
Invalid PUF command | Verify on alternate system, see note 1. |
0x513
|
Voltage glitch detected | Verify voltage to the device is stable. |
0x514
|
Voltage glitch detected | Verify voltage to the device is stable. |
0x515
|
PLM copy error occurred during boot image integrity check | Verify on alternate system, see note 1. |
0x516
|
PLM copy error occurred during boot image integrity check | Verify on alternate system, see note 1. |
0x517
|
PLM copy error occurred because asymmetric authentication is enabled | Verify on alternate system, see note 1. |
0x518
|
PLM copy error occurred because S-HWRoT or non-secure boot set | Verify on alternate system, see note 1. |
0x519
|
Data partition copy error occurred during boot image integrity check | Verify on alternate system, see note 1. |
0x51A
|
Data partition copy error occurred because asymmetric authentication enabled | Verify on alternate system, see note 1. |
0x51B
|
Data partition copy error occurred because S-HWRoT/non-secure boot set | Verify on alternate system, see note 1. |
0x51C
|
Timeout error occurred during SHA3 | Verify on alternate system, see note 1. |
0x51D
|
Timeout error occurred during SHA3 | Verify on alternate system, see note 1. |
0x51E
|
Timeout error occurred during SHA3 | Verify on alternate system, see note 1. |
0x51F
|
Timeout error occurred during SHA3 | Verify on alternate system, see note 1. |
0x520
|
Timeout error occurred during SHA3 | Verify on alternate system, see note 1. |
0x521
|
Timeout error occurred during SHA3 | Verify on alternate system, see note 1. |
0x522
|
Timeout error occurred during SHA3 | Verify on alternate system, see note 1. |
0x523
|
Timeout error occurred during SHA3 | Verify on alternate system, see note 1. |
0x524
|
Timeout error occurred during SHA3 | Verify on alternate system, see note 1. |
0x529
|
AES engine key or KUP key clearing error | Verify on alternate system, see note 1. |
0x52A
|
PUF key clear error | Verify on alternate system, see note 1. |
0x52B
|
Key load KAT error | Verify on alternate system, see note 1. |
0x52C
|
IV load KAT error | Verify on alternate system, see note 1. |
0x52D
|
Data load KAT error | Verify on alternate system, see note 1. |
0x52E
|
GCM tag load KAT error | Verify on alternate system, see note 1. |
0x52F
|
AES timeout KAT error | Verify on alternate system, see note 1. |
0x530
|
KAT GCM tag does not match | Verify on alternate system, see note 1. |
0x531
|
KAT decrypted data does not match original data | Verify on alternate system, see note 1. |
0x532
|
Key load error for counter measure enabled KAT | Verify on alternate system, see note 1. |
0x533
|
DMA timeout error for counter measure enabled KAT | Verify on alternate system, see note 1. |
0x534
|
AES timeout error for counter measure enabled KAT | Verify on alternate system, see note 1. |
0x53C
|
KEK load to AES engine error | Verify on alternate system, see note 1. |
0x53D
|
KEK IV load error | Verify on alternate system, see note 1. |
0x53E
|
Red key load from decrypted KEK error | Verify on alternate system, see note 1. |
0x53F
|
AES DPA counter measure KAT failed | Verify on alternate system, see note 1. |
0x540
|
AES DPA counter measure KAT failed | Verify on alternate system, see note 1. |
0x541
|
AES DPA counter measure KAT failed | Verify on alternate system, see note 1. |
0x542
|
AES DPA counter measure KAT failed | Verify on alternate system, see note 1. |
0x543
|
AES DPA counter measure KAT failed | Verify on alternate system, see note 1. |
0x544
|
S-HWRoT PLM firmware IV mismatch | Rebuild the image using the correct IV value programmed in eFUSEs. |
0x545
|
S-HWRoT PMC CDO IV mismatch | Rebuild the image using the correct IV value programmed in eFUSEs. |
0x600
|
Voltage glitch detected | Verify the voltage to the device/part is within specification. |
0x700
|
Error occurred with PUF disable | Verify on alternate system, see note 1. |
0x701
|
Error occurred with PUF regeneration disable | Verify on alternate system, see note 1. |
0x707
|
Timeout occurred before PUF word ready asserted | Verify on alternate system, see note 1. |
0x708
|
Timeout occurred before PUF key ready asserted | Verify on alternate system, see note 1. |
0x709
|
Read word not asserted by PUF during regeneration | Verify on alternate system, see note 1. |
0x70A
|
Timeout for PUF occurred before the key was ready | Verify on alternate system, see note 1. |
0x70B
|
Key not converged during regeneration | Verify on alternate system, see note 1. |
0x70C
|
PUF regeneration error | Verify on alternate system, see note 1. |
0x70D
|
PUF regeneration error | Verify on alternate system, see note 1. |
0x70E
|
Helper data in eFUSE is not valid so regeneration is not possible | Verify on alternate system, see note 1. |
0x710
|
Error occurred during PUF zeroization | Verify on alternate system, see note 1. |
0x711
|
PUF interrupt command is invalid | Verify on alternate system, see note 1. |
0x712
|
PUF interrupt NOOP command is not supported | Verify on alternate system, see note 1. |
0x713
|
PUF overflow observed during registration | Verify on alternate system, see note 1. |
0x722
|
DMA operation not completed before SHA3 calculation time | Verify on alternate system, see note 1. |
0x723
|
Timeout error occurred before SHA3 operation completed | Verify on alternate system, see note 1. |
0x726
|
BBRAM zeroization failed during tamper processing | Verify on alternate system, see note 1. |
0x730
|
Tamper event detected | Verify that software or firmware has triggered tamper event through Tamper Trigger register or command and reboot device. |
0x731
|
MIO tamper detected | Verify that MIO configured for tamper indication has asserted and reboot the device. |
0x732
|
JTAG toggle tamper detected | Verify that no JTAG connections are made to the device and reboot the device. |
0x733
|
Temperature tamper event detected | Verify device is operating within temperature tamper range and reboot device. |
0x734
|
Voltage tamper event detected | Verify voltages configured for tamper monitoring are operating within tamper range and reboot device |
0x735
|
Tamper 5 event detected | Confirm configuration of Tamper Response 5 setting and reboot device. |
0x736
|
Tamper 6 event detected | Confirm configuration of Tamper Response 6 setting and reboot device. |
0x737
|
Tamper 7 event detected | Confirm configuration of Tamper Response 7 setting and reboot device. |
0x738
|
Tamper 8 event detected | Confirm configuration of Tamper Response 8 setting and reboot device. |
0x739
|
Tamper 9 event detected | Confirm configuration of Tamper Response 9 setting and reboot device. |
0x73A
|
Tamper 10 event detected | Confirm configuration of Tamper Response 10 setting and reboot device. |
0x73B
|
Tamper 11 event detected | Confirm configuration of Tamper Response 11 setting and reboot device. |
0x73D
|
VCC_PMC voltage glitch detector tamper event detected | Verify VCC_PMC is operating within the device operating specifications and that the voltage glitch detector is configured to the desired glitch detection threshold. Reboot the device. |
0x747
|
PMC MBIST timeout error | Verify on alternate system, see note 1. |
0x748
|
Error occurred during PMC MBIST | Verify on alternate system, see note 1. |
0x749
|
Error occurred during PMC scan clear | Verify on alternate system, see note 1. |
0x74A
|
NoC scan clear error occurred during secure lock down | Verify on alternate system, see note 1. |
0x75A
|
PL scan clear timeout error | Verify on alternate system, see note 1. |
0x75B
|
Error occurred during PL scan clear | Verify on alternate system, see note 1. |
0x75C
|
VCCINT not detected | Check the VCCINT rail voltage is within the data sheet specification. |
0x75D
|
Isolation error occurred between PMC and PL | |
0x75E
|
Error occurred during PL house-cleaning | |
0x75F
|
VCCINT not detected during PL house-cleaning | Check the VCCINT rail voltage is within the data sheet specification. |
0x760
|
Isolation error between PMC and PL CFRAME occurred during PL house-cleaning | |
0x763
|
Key zeroization error occurred during secure lock down | Verify on alternate system, see note 1. |
0x800
|
SYSMON error | Verify on alternate system, see note 1. |
|
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