SelectMAP Bus Width Detect Pattern and Bit Order

Versal Adaptive SoC Technical Reference Manual (AM011)

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The Versal adaptive SoC programmable device image (PDI) boot header is read by the RCU BootROM to determine the SelectMAP bus width. The first 16 bytes in the PDI boot header determine the SelectMAP bus width. The BootROM configures the 32-bit SMAP_IO pins and once the bus detection pattern is recognized, the BootROM un-configures any SMAP_IO MIO pins not used by the selected bus width. The JTAG_STATUS [5:4] register displays the SelectMAP bus width detected by the BootROM.

Table 1. SelectMAP Bus Detection PDI Pattern Options
8-bit bus width 00 00 00 DD 11 22 33 44 55 66 77 88 99 AA BB CC
16-bit bus width 00 00 DD 00 22 11 44 33 66 55 88 77 AA 99 CC BB
32-bit bus width DD 00 00 00 44 33 22 11 88 77 66 55 CC BB AA 99

SelectMAP Bit Order

The SelectMAP interface is typically driven by a user application residing on a processor, controller, or another FPGA or SoC. For these applications, it is important to understand how the data ordering in the programmable device image corresponds to the data ordering expected by the Versal device interface. The following table shows how to load the SelectMAP PDI data bits onto the SelectMAP data pins.

Table 2. SelectMAP PDI 16 Byte Bus Detect Pattern Order
SMAP Bus Width (x8, x16, or x32) SMAP_CLK Cycle
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
D[7:0] 0x00 0x00 0x00 0xDD 0x11 0x22 0x33 0x44 0x55 0x66 0x77 0x88 0x99 0xAA 0xBB 0xCC
D[15:0] 0x0000 0x00DD 0x1122 0x3344 0x5566 0x7788 0x99AA 0xBBCC
D[31:0] 0x000000DD 0x11223344 0x55667788 0x99AABBCC