Versal Adaptive SoC Technical Reference Manual (AM011)

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1.6 English

The interconnect includes the AXI and APB interface protocols. The AXI data width can be 32, 64, or 128 bits. The APB protocol is used for the 32-bit programming interfaces and low-bandwidth data ports.

The smallest data transaction is a single 32-bit word. The largest transaction is a 128-bit data word with a burst of 256 data cycles (4 KB burst size).

  • AXI: Sources can generally burst up to 256 words
  • AXI: Some destinations can only receive up to 16-word bursts
  • APB register interfaces: Receive single 32-bit data word
  • NPI register interfaces: Receive burst of 32-bit data words

Burst Length Transactions

The interconnect manages transaction requests when the source and destination have a different data width or burst length, the transaction is modified, including breaking up a long burst into shorter bursts.

When an AXI transaction includes a 256-word burst, but the destination only supports 16-word bursts, the interconnect breaks the transaction into 16-word bursts with the proper data width for the destination interface.

Data Width Transactions

Width reductions and expansions exist in many parts of the interconnect. These are managed with few programming inventions. The width of the interfaces with the PL is programmable. In some cases, splitters need to be configured to select NoC interface channels.