IPI Controller Implementations

Versal Adaptive SoC Technical Reference Manual (AM011)
Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The following table shows the comparisons of the IPI controllers.

Table 1. Inter-processor Interrupt Controller Implementations, Part A
Device Generation Programming Interface Protection Message Buffer Protection Sets of Interrupts
UltraScale+ MPSoC XPPU provides protection for 0xFF30_0000 XPPU provides protection for0xFF99_0000) Nine sets
Versal device IPI provides protection for 0xFF30_0000 IPI provides its own protection for 0xFF3F_0000 Nine sets
Table 2. Inter-processor Interrupt Controller Implementations, Part B
Device Generation Message buffer programming Permission setting RAM Implementation Lock feature
UltraScale+ MPSoC Fully programmable and in software control XPPU has permission RAM entries for 128x 32B apertures Data and ECC in one RAM module Not present
Versal device Read/write access hard-coded Permissions are hard-coded in hardware Data and ECC in one RAM module Lock feature added