SMMU TBU Instances

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The SMMU TBUs are supported by the SMMU TCU as listed in the following table.

Table 1. SMMU TBU Instances
TBU Ingress Source Destination
TBU 0 LPD AXI protocol CCI S3 ACE-Lite
TBU 1 NoC NSU3 CCI S2 ACE-Lite
TBU 2 Switch from S_AXI_HPC ACE_lite, or NoC NSU2 CCI S1 ACE-Lite
TBU 3 CPM CCI S0 ACE-Lite, MSI
TBU 4 NoC NSU1 Switch to FPD main switch
TBU 5 NoC NSU0, S_AXI_HP, CoreSight FPD main switch or NoC NMU
TBU 6 PL for address translation PL