Interconnect Features

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The interconnect has dedicated 128, 256, and also 512-bit AXI channel connections between the subsystems. These include low-latency datapaths and high-throughput datapaths with buffering. There are also noteworthy datapaths.

The interconnect optimizes the performance of the RPU and APU. The interconnect port connections are shown in PMC-PS-CPM Interconnect Diagram and listed in this section.

Low-latency Datapaths

  • APU to NoC: CCI connections to the NoC
  • RPU to NoC: AXI egress port on OCM switch
  • RPU to OCM: AXI egress port on OCM switch
  • RPU to its TCMs: two cycle access with deterministic execution

High-throughput Datapaths

Popular high-throughput datapaths:

  • APU to NoC with four CCI egress ports
  • RPU to NoC with main switch egress port
  • LPD DMA to FPD main switch

Noteworthy Datapaths

  • APU to CCI to FPD main switch to OCM switch to OCM and XRAM (optional)

Transaction Quality of Service

Each transaction includes a quality of service (QoS) traffic attribute.

  • Isochronous for video and other time-sensitive transactions
  • Low latency for communications and other applications
  • Best effort, bulk traffic for large data sets without critical timing needs

The QoS attribute is recognized by the AMBA® switches and DDR memory controller. System performance can be obtained by setting the QoS attributes appropriately. Each transaction host can generate one or more QoS values. The traffic types are detailed in Quality of Service.