Port Status, Control, Host Interrupter, Event Ring, and Doorbell Registers

Versal Adaptive SoC Technical Reference Manual (AM011)

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The USB port status, control, host interrupter, event ring, doorbell registers are located in the USB_XHCI register set at base address 0xFE20_0000. They are summarized in the following table.

  • PORTPMSC_20 register

    This register is in the AUX power well. It is only reset by platform hardware during a cold reset or in response to a host controller reset (HCRST).

  • IMOD_0, 1, 2, 3 register

    Software can use this register to pace (or even out) the delivery of interrupts to the host CPU. This register provides an inter-interrupt delay between interrupts asserted by the xHCI, regardless of USB traffic conditions. To independently validate configuration settings, software can use the algorithms recommended by the xHCI specification to convert the inter-interrupt interval value to the common interrupts/sec performance metric.

Table 1. Port Status, Control, Host Interrupter, Event Ring, Doorbell Registers
Register Name Offset Address Access Type Description
0x00420 RW, R, W1C Port status and control
0x0042C RW LPM hardware control
0x00440 Read Microframe index
to 3 0x00460 incr RW, W1C Interrupter management
to 3 0x00464 incr RW Interrupter moderation
to 3 0x00468 incr RW Event ring segment table size

to 3
to 3

0x00470 incr
0x00474 incr


to 3
to 3

0x00478 incr
0x0047C incr

DB{1 to 63} 0x004E0 incr RW Doorbells