Additional Documents - AM011

Versal Adaptive SoC Technical Reference Manual (AM011)
Document ID
AM011
Release Date
2025-03-11
Revision
1.7 English

This technical reference manual is complemented by many other documents to provide more information about device functionality and system development. The functional unit revision content is listed in the Functional Unit Implementation Links section.

Product Guide

There are several device families with different options for size and functionality.

  • Versal Architecture and Product Data Sheet: Overview (DS950)

Register Reference

  • Versal Adaptive SoC Register Reference (AM012)
  • Versal Adaptive SoC Register Reference with Security Registers (AM018) available under NDA in the Design Security Lounge

Programmable Logic

The hardware documents for the programmable logic include:

  • Versal Adaptive SoC Clocking Resources Architecture Manual (AM003)
  • Versal Adaptive SoC DSP Engine Architecture Manual (AM004)
  • Versal Adaptive SoC Configurable Logic Block Architecture Manual (AM005)
  • Versal Adaptive SoC Memory Resources Architecture Manual (AM007)

NoC Interconnect and DDR Memory Controller

  • Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)
  • Versal Adaptive SoC PCB Design User Guide UG863
  • Versal Adaptive SoC NoC and Integrated Memory Controller NPI Register Reference (AM019)

Security Units

The security unit documents are available on the Design Security Lounge. Access to the lounge requires an active NDA.

  • Versal Security Libraries User Guide (UG1540)

Safety Units

  • Versal Adaptive SoC System Monitor Architecture Manual (AM006)

AI Engine

The AI Engine documentation includes:

  • Versal Adaptive SoC AI Engine Architecture Manual (AM009)
  • Versal Adaptive SoC AI Engine Register Reference (AM015)
  • Versal Adaptive SoC AIE-ML Architecture Manual (AM020)
  • Versal Adaptive SoC AIE-ML Register Reference (AM025)
  • AI Engine Tools and Flows User Guide (UG1076)
  • AI Engine Kernel and Graph Programming Guide (UG1079)
  • AI Engine-ML Kernel and Graph Programming Guide (UG1603)
  • AI Engine System Software Driver Reference Manual (UG1642)

CPM4 Coherent PCIe Module

The documentation for the CPM4 includes:

  • Versal Adaptive SoC CPM CCIX Architecture Manual (AM016)
  • Versal Adaptive SoC CPM Mode for PCI Express Product Guide (PG346)
  • Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)
  • Versal Adaptive SoC Register Reference (AM012)

I/O Architecture

The I/O documentation includes:

  • Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010)
  • Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002)
  • Versal Adaptive SoC GTM Transceivers Architecture Manual (AM017)

DC and AC Switching Characteristics Data Sheet

The DC and AC switching characteristics are defined for each series in the:

  • Versal Prime Series Data Sheet: DC and AC Switching Characteristics (DS956)
  • Versal AI Core Series Data Sheet: DC and AC Switching Characteristics (DS957)
  • Versal AI Edge Series Data Sheet: DC and AC Switching Characteristics (DS958)
  • Versal Premium Series Data Sheet: DC and AC Switching Characteristics (DS959)
  • Versal HBM Series Data Sheet: DC and AC Switching Characteristics (DS960)

PCB Design and Monitoring

The information for the PCB schematic and layout are provided in the:

  • Versal Adaptive SoC PCB Design User Guide (UG863)
  • Recommended Design Rules and Strategies for BGA Devices User Guide (UG1099)
  • Power Design Manager User Guide (UG1556)
  • Versal Adaptive SoC System Monitor Architecture Manual (AM006)
  • Versal Adaptive SoC Packaging and Pinouts Architecture Manual (AM013).

Software Developers Guide

The software developers guide describes the software boot sequences after the PMC has prepared the system for the boot and has fetched the boot image from the boot device.

  • Versal Adaptive SoC System Software Developers Guide (UG1304)