Miscellaneous Control, Status, and Capabilities Registers - AM011

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2025-03-11
Revision
1.7 English

The USB miscellaneous control, status, and capabilities registers are located in the USB_XHCI register set at base address 0xFE20_0000. They are summarized in the following table.

Table 1. USB Miscellaneous Control, Status, and Capabilities Registers
Register Name Offset Address Access Type Description
USBLEGSUP 0x08E0 RW, R Legacy support
USBLEGCTLSTS 0x08E4 W1C, R System management interrupts (SMI)
IMPL_USBv2_DW0

0x08F0

R Capabilities, revision
IMPL_USBv2_DW1

0x08F4

R Name string
IMPL_USBv2_DW2

0x08F8

R Hub, miscellaneous capabilities
IMPL_USBv2_DW3

0x08FC

R Protocol slot (0h)