Output Programming Model

Versal Adaptive SoC Technical Reference Manual (AM011)

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1.6 English

In output mode, the output is driven by a register bit setting. The direction control and the output enable must both be set = 1 for the register setting to appear as an output on the MIO pin.

The pin direction is controlled by the DIRM_n register bits. In output mode, the value of the DATA_n register bit is driven out to the I/O signal pin. In input mode, the I/O signal pin logic level can be read using the DATA_n_RO register and enabled to generate an interrupt.

The output enable can be used to control whether an output value is driven on the pin. The actual I/O pad direction is the logical combination of both these signals. The output enable value is ignored when the direction mode is set to input.