Device-Level Resets - Device-Level Resets - AM011

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2026-03-06
Revision
1.9 English

The following table lists the device-level reset sources. The table includes the source of the reset, its effects on the hardware, and activity in the Reset Reason register as described in the Reset Reason Register section.

Table 1. Device-Level Reset Sources
Reset Source Notes Reset Reason Register
POR - External

External POR_B device pin
Critical power supplies

• Resets all logic and registers
• Boot mode pins are sampled
• Causes the external POR boot process in RCU BootROM code

[external_por]
POR - Internal Device-Level

EAM_PMC_POR

Device-level POR; see System Errors

[err_por]

CRP
            RST_PS
        
[PMC_POR]

Device-level POR

[sw_por]
POR - Internal Subsystem-Level

CRP register
            RST_PS
        
[PS_POR]

PS POR -

CRP register
            RST_PS
        
[PL_POR]

PL POR -

CRL register
            RST_FPD
        
[POR]

FPD POR -

CRP register
            RST_NONPS
        
[NOC_POR]

NoC and SoC POR -
SRST - System Resets

System error accumulator module (EAM):
• EAM_SRST

Device-level system reset1; see System Errors

[err_sys]

JTAG TAP register, instruction:
• SYSTEM_RESET

Device-level system reset 1  

CRP register
            RST_PS
        
[PMC_SRST]

Device-level system reset 1 [sw_sys]

CRP register
            RST_PS
        
[PS_SRST]

LPD and FPD system reset -

CRL register
            RST_FPD
        
[SRST]

FPD system reset -

CRP register
            RST_PS
        
[PL_SRST]

PL system reset 1 -

CRP register
            RST_NONPS
        
[NOC_RESET]

NoC system reset -

CRP register
            RST_NONPS
        
[NPI_RESET]

NPI system reset -
Debug Resets
Miscellaneous See Debug Resets [dap_sys]
  1. For VC1902, VC1802, VM1802, VM1402, and VM1302 devices with PL HDIO operating at 3.3V or 2.5V, avoid using SRST. For details, see AR 76914-1.