RX Buffer Usages

Versal Adaptive SoC Technical Reference Manual (AM011)

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1.6 English
Figure 1. Normal Operation (RX Buffer 0)
Figure 2. Normal Operation (RX Buffer 1)
Figure 3. Message Drop When RX Buffer 0 Full and Match = Yes
Figure 4. Message Drop When RX Buffer 1 Full and Match = Yes
Note: If all UAF bits are set to 0, the received messages are not stored in any RX buffer.
Important: Ensure proper programming of the [IDE] bit for standard and extended frames in the Mask register and ID register. If the [IDE] bit is set to 0, it is considered to be a standard frame ID check. Consequently, if the standard ID bits of the incoming message match the respective bits of the filter ID (after applying Mask register bits), the message is stored.