MIO and Dedicated I/O Banks

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The MIO banks provide I/O connectivity for the PMC and LPD. Each bank includes LVCMOS buffers with several programmable features. Three banks are for the multiplexed I/O (MIO) and one bank is for the PMC dedicated pins.

There are also four dedicated analog signals (DIO_A) associated with the PMC system monitor.

  • Bank 500:
    • PMC MIO bank 0 with 26 pins
    • PMC dedicated analog pins; see Versal Adaptive SoC System Monitor Architecture Manual (AM006)
  • Bank 501: PMC MIO bank 1 with 26 pins
  • Bank 502: LPD MIO bank with 26 pins
  • Bank 503: PMC dedicated digital with 15 pins

The PMC and LPD MIO pins are described in the Multiplexed I/O Signals and Pins chapter. The dedicated pins are described in the PMC Dedicated Pins chapter.