The AMD memory protection unit (XMPU) in the Versal adaptive SoC is similar to the one in the Zynq UltraScale+ MPSoC. The following table shows the functional differences.
| Device Generation | Error Handling | Response to Address in Secure Range but ID Match Fails | Dynamic Reconfiguration after Boot |
|---|---|---|---|
| UltraScale+ MPSoC | Poison the base address | Allow or deny based on default read/write configuration | Not supported |
| Versal Adaptive SoC | Issue a fail message on the interconnect back to initiator | By default, transaction is denied | Supported |