The system interrupts are generated by various subsystem units and are routed to the system interrupt controllers. The following table lists the system interrupts.
IRQ Name | IRQ | PMC & PSM Global Register | Description |
---|---|---|---|
IRQ Status Register 0 | |||
reserved | 32:39 | GICP0 [0:7] | reserved |
RPU0_PERF_MON | 40 | GICP0 [8] | Performance monitor |
RPU1_PERF_MON | 41 | GICP0 [9] | |
OCM | 42 | GICP0 [10] | OCM error |
RPU0_ERR | 43 | GICP0 [11] | Combined errors: FPU, memory ECC, and AXI access |
RPU1_ERR | 44 | GICP0 [12] | |
LPD_GPIO | 45 | GICP0 [13] | LPD GPIO controller |
LPD_I2C0 | 46 | GICP0 [14] | LPD I2C 0 controller |
LPD_I2C1 | 47 | GICP0 [15] | LPD I2C 1 controller |
SPI0 | 48 | GICP0 [16] | SPI 0 controller |
SPI1 | 49 | GICP0 [17] | SPI 1 controller |
UART0 | 50 | GICP0 [18] | UART 0 controller |
UART1 | 51 | GICP0 [19] | UART 1 controller |
CANFD0 | 52 | GICP0 [20] | CANFD 0 controller |
CANFD1 | 53 | GICP0 [21] | CANFD 1 controller |
USB_INTR | 54:57 | GICP0 [22:25] | USB 2.0 controller bulk transfer, isochronous transfer, controller interrupt, control transfer |
USB_Controller | 58 | GICP0 [26] | USB 2.0 controller |
PMC_BUF_IPI | 59 | GICP0 [27] | OR of all IPIs targeted to PMC with message buffer |
PMC_NOBUF_IPI | 60 | GICP0 [28] | OR of all IPIs targeted to PMC without message buffer |
PSM_IPI | 61 | GICP0 [29] | OR of all IPIs targeted to PSM |
IPI0 | 62 | GICP0 [30] | IPI 0 interrupt |
IPI1 | 63 | GICP0 [31] | IPI 1 interrupt |
IRQ Status Register 1 | |||
IPI2 | 64 | GICP1 [0] | IPI 2 interrupt |
IPI3 | 65 | GICP1 [1] | IPI 3 interrupt |
IPI4 | 66 | GICP1 [2] | IPI 4 interrupt |
IPI5 | 67 | GICP1 [3] | IPI 5 interrupt |
IPI6 | 68 | GICP1 [4] | IPI 6 interrupt |
TTC0_Timer[0:2] | 69:71 | GICP1 [5:7] | TTC controller 0, timer/counter 0 to 2 |
TTC1_Timer[0:2] | 72:74 | GICP1 [8:10] | TTC controller 1, timer/counter 0 to 2 |
TTC2_Timer[0:2] | 75:77 | GICP1 [11:13] | TTC controller 2, timer/counter 0 to 2 |
TTC3_Timer[0:2] | 78:80 | GICP1 [14:16] | TTC controller 3, timer/counter 0 to 2 |
LPD_SWDT_INT | 81 | GICP1 [17] | SWDT in LPD |
PSM | 82 | GICP1 [18] | PSM interrupt |
LPD_XPPU | 83 | GICP1 [19] | XPPU in LPD |
LPD_INT | 84 | GICP1 [20] | OR of peripherals on the LPD interconnect |
PMC_SysMon | 85 | GICP1 [21] | PMC system monitor |
reserved | 86:87 | GICP1 [22:23] | reserved |
GEM0 | 88 | GICP1 [24] | GEM controller 0 |
GEM0_Wakeup | 89 | GICP1 [25] | GEM controller 0 wake-up |
GEM1 | 90 | GICP1 [26] | GEM controller 1 |
GEM1_Wakeup | 91 | GICP1 [27] | GEM controller 1 wake-up |
LPD_DMA[0:3] | 92:95 | GICP1 [28:31] | LPD DMA channels 0 to 3 |
IRQ Status Register 2 | |||
LPD_DMA[4:7] | 96:99 | GICP2 [0:3] | LPD DMA channels 4 to 7 |
OCM_XMPU | 100 | GICP2 [4] | XMPU for the OCM |
LPD_SWDT_INT_PEND | 101 | GICP2 [5] | SWDT in LPD reset pending |
LPD_SWDT_INT_WS[0:1] | 102:103 | GICP2 [6:7] | SWDT in LPD WS 0 and 1 |
CPM | 104 | GICP2 [8] | OR of CPM interrupts and events |
CPM_CE | 105 | GICP2 [9] | CPM interrupt 1, correctable error |
USB_PME | 106 | GICP2 [10] | USB power management event (PME) from the USB power management unit (PMU) |
CPM_UE | 107 | GICP2 [11] | CPM interrupt 2, uncorrectable error |
reserved | 108:109 | GICP2 [12:13] | reserved |
XRAM | 110 | GICP2 [14] | Accelerator RAM controller |
XRAM_CE | 111 | GICP2 [15] | Accelerator RAM correctable error |
XRAM_UE | 112 | GICP2 [16] | Accelerator RAM uncorrectable error |
reserved | 113:115 | GICP2 [17:19] | reserved |
PL_PS_Group0_[0:7] | 116:123 | GICP2 [20:27] | PL_IRQ[0:7] to LPD |
PL_PS_Group1_[0:3] | 124:127 | GICP2 [28:31] | PL_IRQ[8:11] to FPD |
IRQ Status Register 3 | |||
PL_PS_Group1_[4:7] | 128:131 | GICP3 [0:3] | PL_IRQ[12:15] to FPD |
FPD_SWDT_INT | 132 | GICP3 [4] | SWDT in FPD |
reserved | 133 | GICP3 [5] | reserved |
FPD_XMPU | 134 | GICP3 [6] | XMPU in FPD |
APU_L2 | 135 | GICP3 [7] | APU L2-cache double bit ECC error |
EXT_ERR | 136 | GICP3 [8] | External error |
APU processor | 137 | GICP3 [9] | APU interrupts |
CCI | 138 | GICP3 [10] | FPD cache coherent interconnect (CCI) |
FPD_SMMU | 139 | GICP3 [11] | FPD system memory management unit (SMMU) |
FPD_SWDT_INT_WS0 | 140 | GICP3 [12] | SWDT controller in FPD, WS0 |
FPD_SWDT_INT_RST_PEND | 141 | GICP3 [13] | FPD_SWDT reset pending |
FPD_SWDT_INT_WS1 | 142 | GICP3 [14] | SWDT controller in FPD, WS1 |
reserved | 143:151 | GICP3 [15:23] | reserved |
PMC_CFU | 152 | GICP3 [24] | Configuration frames unit |
reserved | 153 | GICP3 [25] | reserved |
PMC_GPIO | 154 | GICP3 [26] | PMC GPIO controller |
PMC_I2C | 155 | GICP3 [27] | PMC I2C controller |
OSPI | 156 | GICP3 [28] | OSPI controller |
QSPI | 157 | GICP3 [29] | QSPI controller |
SD/eMMC0 | 158 | GICP3 [30] | SD/eMMC controller 0 |
SD/eMMC0_Wakeup | 159 | GICP3 [31] | SD controller 0 wake-up |
IRQ Status Register 4 | |||
SD/eMMC1 | 160 | GICP4[0] | SD/eMMC controller 1 |
SD/eMMC1_Wakeup | 161 | GICP4[1] | SD controller 1 wake-up |
reserved | 162 | GICP4[2] | reserved |
PMC_DMA0 | 163 | GICP4[3] | PMC DMA 0 |
PMC_DMA1 | 164 | GICP4[4] | PMC DMA 1 |
PMC_AXI | 165 | GICP4[5] | OR of the peripherals on PMC interconnect |
PMC_XPPU | 166 | GICP4[6] | PMC XPPU |
PMC_XMPU | 167 | GICP4[7] | PMC XMPU |
SBI | 168 | GICP4[8] | Supervised boot interface unit |
AES | 169 | GICP4[9] | AES |
RSA | 170 | GICP4[10] | ECDSA RSA |
EFUSE | 171 | GICP4[11] | eFUSE |
SHA | 172 | GICP4[12] | SHA |
TRNG | 173 | GICP4[13] | True random number generator |
RTC_Alarm | 174 | GICP4[14] | RTC alarm |
RTC_Seconds | 175 | GICP4[15] | RTC seconds |
SYSMON | 176 | GICP4[16] | Voltage and temperature system monitor |
reserved | 177 | GICP4[17] | reserved |
NPI_IRQ0 | 178 | GICP4[18] |
NPI interrupt 0, DDRMC_MB all correctable software errors and interrupts |
NPI_IRQ2 | 179 | GICP4[19] |
NPI interrupt 2, DDRMC_MC all correctable errors |
NPI_IRQ5 | 180 | GICP4[20] |
NPI interrupt 5, AI Engine all correctable errors and miscellaneous events |
NPI_IRQ6 | 181 | GICP4[21] |
NPI interrupt 6, AI Engine debug events and miscellaneous events |
NPI_IRQ7 | 182 | GICP4[22] |
NPI interrupt 7, AI Engine miscellaneous events |
NPI_IRQ8 | 183 | GICP4[23] |
NPI interrupt 8, GT interrupts and requests |
NPI_IRQ9 | 184 | GICP4[24] |
NPI interrupt 9, GT all correctable errors |
reserved | 185 | GICP4[25] | reserved |
NPI_IRQ20 | 186 | GICP4[26] |
NPI interrupt 20, NoC user interrupts and errors |
NPI_IRQ21 | 187 | GICP4[27] |
NPI interrupt 21, NoC user interrupts and errors |
NPI_IRQ22 | 188 | GICP4[28] |
NPI interrupt 22, NoC user interrupts and errors |
NPI_IRQ23 | 189 | GICP4[29] |
NPI interrupt 23, NoC user interrupts and errors |
PMC RAM | 190 | GICP4[30] |
PMC RAM |
reserved | 191 | GICP4[31] | reserved |