Versal Adaptive SoC Technical Reference Manual (AM011)

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1.6 English

The dual-port block RAMs have 32 KB of data storage capacity that is protected by error correction coding (ECC) for a total of 288 Kb per block RAM. Each port can be configured independently as 32K×9, 16K×18, 8K×36, or 4K×72.

  • Cascade-able for building larger memories: dedicated column routing wires to connect adjacent units
  • ECC on both ports with single bit error detection and correction, and double bit error detection
  • Sleep power saving features

The UltraRAM is described in the Versal Adaptive SoC Memory Resources Architecture Manual (AM007).