There are two system watchdog timers (SWDT) instances on the device, and both have the same programming model.
| SWDT Instance Name | Register Base Address | Typically Used By | I/O Signal Prefix |
|---|---|---|---|
| LPD_SWDT | 0xFF12_0000 | RPU | SWDT0_ |
| FPD_SWDT | 0xFD4D_0000 | APU | SWDT1_ |
It is possible to implement an external watchdog timer (WDT) to monitor the health of other processors and controllers. This can be done in the PL or external to the device. See the Versal Adaptive SoC System Software Developers Guide (UG1304) for an example framework for the PLM firmware.