Base Time Period

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The base time period is programmed by selecting the reference clock and the number of clock periods to include in the time base. The registers for channel 0 are:

  • Select base clock: CLKMON0_CTRL [BASECLK_SEL]
  • Program cycles per base time period: CLKMON0_BASE [CLK_CYCLES]

The REF_CLK is typically 33 MHz, but can be higher or lower. The PMC_IRO_CLK is typically 320 MHz but can bumped to 400 MHz with faster speed grades. These are independent clocks. The frequency range for REF_CLK and the trimmed frequency of the PMC_IRO_CLK are listed in the DC/AC data sheet.

Figure 1. ClkMon Base Time Period