PMC and PS Perspectives

Versal Adaptive SoC Technical Reference Manual (AM011)

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1.6 English

The PMC/PS interconnect transactions include a 44- or 48-bit address:

  • 44-bit physical address (32 TB)
  • 48-bit virtual address (512 TB) plus a context selection bit

When routing a transaction to the FPD SMMU, use a 48-bit address with a 49th bit used to define the operating context: application or kernel. All other destinations, including memories, NoC, and PL, use 44-bit addressing. The routing controls for each source are listed in the Routing and Coherency Controls section.