The AMD Versal™ adaptive SoC includes integrated hardware options. These are components located in the LPD and PL power domains and include connections to the PL.
Note: The options for
each device are listed in the
Versal
Architecture and Product Data Sheet: Overview (DS950). The TRM identifies these as device
options.
The following table lists the integrated hardware options.
| Integrated Hardware | Acronym | Power Domain | Note |
|---|---|---|---|
| AI Engine | AI Engine | PL | |
| AI Engine | AI Engine-ML | PL | |
| Accelerator RAM | XRAM | LPD | Versal adaptive SoC: 4 MB |
|
PCIe r4.0 with CCIX r1.0 2xGen4x8, or Gen4x16 |
CPM4 | PL | Versal adaptive SoC |
|
PCIe r5.0 with CCIX r1.1 2xGen5x8, 2xGen4x8, or Gen4x16 |
CPM5 | LPD | Versal adaptive SoC |
| High-Bandwidth Memory Interface with in-package HBM dies | HBM | SPD | Versal adaptive SoC |