The following table shows the UART controller implementation.
| Device Generation | Instances | UART Controller | UART SBSA | RTS and CTS Flow Control Signals | IrDA Mode |
|---|---|---|---|---|---|
| AMD UltraScale+™ MPSoC | 2x in IOP with TxD, RxD on MIO pins | Cadence IP | No | Available on EMIO | No |
| AMD Versal™ adaptive SoC | 2x in LPD on MIO pins (RxD, TxD) and EMIO port interface | UART SBSA controller Arm version r1p5-00rel1 |
Yes | Available on MIO or EMIO | Yes |