AXI Transaction Signals

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The format of the transaction signals is shown in the following table. There are two sets of signals, one for reads and one for writes.

Table 1. Transaction Signals
Entry Description
Offset address Transaction address
User flags SMID
Security flag Protection (PROT)
Valid Valid indicator
Hold  
Error flag Pass/fail result
Read or write indicator 0 = write, and 1 = read
Hide Hide control from CTRL [HideAllowed] bit output from XMPU to protection wrapper
Sideband Interrupt