The SRC DMA generates an address to the flash controller via its interface to read data from the flash memory device.
The SRC DMA writes the data from flash device to the DMA buffer. The DST DMA then writes the data in the buffer to system memory. Single transactions are four bytes and burst transactions are always 64 bytes.
Control Settings
The following table lists the SRC DMA settings.
| Register | Offset Address | Write Value | Description |
|---|---|---|---|
| DMA_Config |
0x0020
|
0000_0602h
|
Transfer size: four bytes for single AXI transfer and 64 bytes for AXI burst transfer. The DMA does not support any other transfer sizes. |
| Indirect_Read_Watermark |
0x0064
|
0000_0000h
|
To indicate data availability as and when sufficient data is available in the buffer. |
| Indirect_Trig_Addr |
0x0080
|
0000_0006h
|
The SRC DMA can execute only a fixed burst of 64-bytes. |
| SRAM_Partition_Config |
0x0018
|
0000_00FEh
|
Allocate the 1 KB buffer for SRC DMA read operations. |