The programming interface type used for each block is listed in the following table.
Note: Not all blocks and subsystems
are present in all devices.
Note: See the
Versal
Architecture and Product Data Sheet: Overview (DS950) for a guide.
| Block or Subsystem | Primary Programming Interface Type | PL-based Interface Option | Notes |
|---|---|---|---|
| PMC | APB | - | |
| PS (RPU, APU, IOPs) | APB | - | |
| CPM-PCIe |
Mostly APB |
APB | |
| PL interconnect programming | CFU | - | |
| PL CLE | CFU | - | |
| PL Block RAM, UltraRAM configuration | CFU | - | |
| MRMAC/DRMAC | CFU | APB | |
| Interlaken | CFU | APB | |
| SDFEC | - | AXI4-Lite | |
| HDIO configuration | CFU | - | |
| HDIO DPLLs | CFU | APB | |
| Other DPLLs | NPI | - | |
| NoC | NPI | - | NoC channel configuration |
| GTs | NPI | APB | |
| DDRMC | NPI | - | DDR memory controller |
| HBM | NPI | - | |
| XPipe, CPipe | NPI | - | |
| XPIO, XPLL | NPI | - | |
| XPHY | NPI | APB | |
| MMCM, BUFG | NPI | APB | |
| Miscellaneous clocks | NPI | - | BUFGS, PLL, PHY, GT, VNOC, CORE |
| DAC, ADC | NPI | APB | |
| AI Engine configuration | NPI | - | |
| AI Engine code, data | NoC | NoC | Memory-mapped |