Channel Disabled

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The channel can go into a disabled state for these reasons:

  • Current SRC descriptor indicates CMD = STOP.
    • DMA processes the current descriptor and goes into a disable state.
    • DMA channel ensures that all the data is transferred to the DST memory location before going into a disable state and updating the status register.
    • This mechanism can be used to indicate the end of an operation.
  • DMA channel is in simple DMA mode and transfer is done.
    • After a channel is done transferring the data indicated into the SRC/DST DSCR register, the channel goes into a disable state.
    • For subsequent transfers, the software must enable the channel.
  • Software can put any paused channel into a disable state.
    • The current channel state is pause and it has received a CONT from the APB register.
      • Mode = Pause & enable = 0 and CONT = 1
      • The DMA channel goes into disable mode
  • Any error detected on an AXI channel/descriptor programming puts the DMA channel into a disable state.