The accelerator RAM (XRAM) is a device option with 4 MBs of memory with one interface on the LPD OCM switch and up to three ports from the PL. These four channels interface to a four way crossbar switch. On the backside, the crossbar switch has a channel to each of the four memory banks. Each path to the four memory banks includes its own memory protection unit (XMPU).
The crossbar supports simultaneous access of multiple pathways. The crossbar also allows full cross-bank access from any port to any bank. The LPD PS port is a 128-bit AXI4 interface. Where available, each PL interface is AXI4 and can be independently configured for 32, 64, 128, or 256-bit data widths.
The XRAM is described in the Accelerator RAM chapter.