PMC Interconnect Components

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The PMC interconnect includes two large AXI switches with several memory protection units. The PMC also includes an AXI4-Stream switch with channels the SBI, DMA, AES, and SHA3. The DPC and JTAG integrated debug include several different interfaces and special-use channels.

AXI Switches

The PMC interconnect includes the following switches:

  • PMC main switch, including the aux and APB switches
  • PMC IOP switch

Memory and Peripheral Protection Units

The PMC interconnect includes protection units for the following interfaces in the PMC main switch:

  • XMPU for the PMC_RAM and SBI
  • XPPU for the CFU and PMC peripheral interfaces
  • XPPU for the NPI host bus controller

For more information, see the Xilinx Memory Protection Unit and Xilinx Peripheral Protection Unit chapters.