Access Modes

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
Release Date
1.6 English

There are several access modes:

  • Software triggered instruction generation (STIG read/write)
  • Direct read/write mode
  • Non-DMA indirect read/write mode
  • DMA indirect read mode
Note: For double data rate (DDR) mode, the address must be aligned to an even address boundary and the transfer size must be a multiple of even bytes. Software must ensure this for all access modes. If an odd number of bytes are requested, then the data abort is signaled. In all DDR mode cases, the device_delay [d_after] register bit must be set to 1.