GPIO I/O Signals

Versal Adaptive SoC Technical Reference Manual (AM011)

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1.6 English

The GPIO channels for three of the GPIO controllers (26 channels each) can be routed to one of two places:

  • MIO pins, or
  • PL EMIO port signals (default)

The GPIO channels for the three other GPIO controllers (32 channels each) are always routed to the PL via EMIO.

Each I/O pin is individually programmed. For example, the PMC MIO pin 0 is controlled by the PMC MIO_PIN_0 register.

Each GPIO channel consists of data in, data out, and 3-state output control. For MIO, these signals control the I/O buffer on the pin pad. For PL EMIO, all three signals connect between the GPIO controller and the PL. The I/O channel parameters are programmed on a per bank basis.