Self-Test - AM011

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID: AM011
Release Date: 2023-10-05
Revision: 1.6 English

Table 1. I2C Self-Test
Task	Register	Register Field	Bits	Operation
All I2C registers should be in their default state.
Read control register (CR)	Control, `0x00`	All	15:0	Read operation
Read interrupt mask register (imr)	IMR, `0x20`	All	9:00	Read operation
If (CR != 0) OR if (IMR != 0x2FF), stop here.
Perform reset (see Reset Hardware).
Write test value (`0x05`) into slave monitor register	Slave_Mon_Pause, `0x18`	Pause	3:0	`5h`
Read back slave monitor register	Slave_Mon_Pause, `0x18`	Pause	3:0	Read operation
Verify the value with the written value. If not the same, test failed; else passed.
Reset slave monitor register	Slave_Mon_Pause, `0x18`	Pause	3:0	`0h`