SelectMAP Sequence - SelectMAP Sequence - AM011

Versal Adaptive SoC Technical Reference Manual (AM011)
Document ID
AM011
Release Date
2026-03-06
Revision
1.9 English

The SelectMAP interface allows an external processor to load the boot and configuration data. The functional waveform in this section shows an example of the SelectMAP interface data, clock, and control signals operation to load data into the Versal adaptive SoCs. To boot the Versal device in SelectMAP, ensure that the dedicated boot mode pins are set to SelectMAP (MODE[3:0]=1010) and SMAP_RDWR_b=0. Also, the REF_CLK input must be at a valid frequency and stable before the POR_B release. The Versal device samples the SelectMAP data pins on the rising SMAP_CLK edges and the SMAP_BUSY signal is also clocked by the SMAP_CLK.

The waveform shows the 16 byte bus detect pattern for the SelectMAP boot mode. The waveform shows an example BUSY response. When SMAP_BUSY is asserted, the SMAP_CS_b signal must be deasserted within 24 SMAP_CLK cycles.

Figure 1. Example SelectMAP 32-bit Data Loading

Figure Notes:
  1. After POR_B and SMAP_BUSY are deasserted, the user can start data loading.
  2. The SelectMAP bus detect pattern is the first 16 bytes of the PDI. This pattern determines if the SelectMAP data bus width used is 8 bit, 16 bit, or 32 bit. The JTAG_STATUS [5:4] SelectMAP bus width field is updated when this pattern is read by the BootROM.
  3. When SMAP_BUSY is asserted during SelectMAP data loading, the SMAP_CS_b must be deasserted within 24 SMAP_CLK cycles (CSMAPBUSYCS).
  4. After the last data byte is sent, deassert SMAP_CS_b and send a minimum of 24 SMAP_CLK cycles to ensure the last data byte reaches the SBI FIFO. Depending on PDI processing, including DDR memory processing, it may take up to 3 seconds for DONE to go High after the last data byte is sent.
Important: SMAP_CS_b must be asserted only when presenting PDI data. Otherwise, SMAP_CS_b must be deasserted before delivery of the first PDI word, within 24 SMAP_CLK cycles of an asserted SMAP_BUSY signal during PDI data delivery, after delivery of the last PDI data word, and whenever non-PDI data is presented. The SMAP_CLK registers PDI data from the SMAP_IO data pins and must run even when SMAP_CS_b is deasserted to clock logic related to the SMAP_BUSY status or related to internal forwarding of PDI data.