Error Handling

Versal Adaptive SoC Technical Reference Manual (AM011)

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1.6 English

Errors can occur from security or read/write violations. When an error occurs, the XMPU records the type of violation, the transaction address, and the SMID of the first transaction that failed. The protection unit flags the violation and can generate an interrupt. When a security violation occurs, there is an additional logging to indicate that the error was a security violation. Only one error and the first error is recorded for both read/write AXI channels.

Permission and Security Violations

When a permission or security violation is detected, the XMPU asserts the error flag in the transaction header. This header is read to determine what action to take. The XMPU also records the address, error type, and SMID number. An interrupt can be generated. Only the first occurrence of an error is recorded. For simultaneous read and write errors, only the write error is recorded.

The transaction is stored in these registers:

The type of violation is recorded in the ISR register:

  • [SecurityVIO]
  • [WrPermVIO]
  • [RdPermVIO]