The secure-stream switch (SSS) allows data movement between multiple sources and destinations. During boot, the secure-stream switch is exclusively controlled by the CSU. After boot, any system master can control the configuration of the secure-stream switch. Table: Secure Stream Switch lists the possible connections in the secure stream switch.
The JTAG PS TAP controller is accessible via the dedicated PS pins. The AXI DMA is in the CSU.
|
Destinations |
|||||
---|---|---|---|---|---|---|
AXI DMA |
JTAG |
AES-GCM |
PCAP |
SHA |
||
Sources |
AXI DMA |
X |
|
X |
X |
X |
JTAG |
X |
|
|
X |
|
|
AES-GCM |
X |
|
|
X |
|
|
PCAP |
X |
X |
|
|
|
|
ROM |
|
|
|
|
X |
The secure-stream switch is configured using a single SSS configuration register (csu_sss_cfg). Some common configurations for the secure stream switch are listed in Table: Secure Stream Switch Configurations.