For each unique value multiplier value, program the PLLs using registers in the CRL_APB and CRF_APB register sets (LPD and FPD). Each of the five PLLs have a set of integer programming parameters:
°{CRL, CRF}_APB.xPLL_CFG[CP]
°{CRL, CRF}_APB.xPLL_CFG[RES]
°{CRL, CRF}_APB.xPLL_CFG[LFHF]
°{CRL, CRF}_APB.xPLL_CFG[LOCK_DLY]
°{CRL, CRF}_APB.xPLL_CFG[LOCK_CNT]
Table: PLL Integer Feedback Divider Helper Data Values provides the PLL configuration register programming values when the PLL is in integer mode. The frequency of the VCO must stay within the range specified in Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics (DS925) [Ref 2].
Table 37-1: PLL Integer Feedback Divider Helper Data Values
|
FBDIV
|
CP
|
RES
|
LFHF
|
LOCK_DLY
|
LOCK_CNT
|
|
25
|
3
|
10
|
3
|
63
|
1000
|
|
26
|
3
|
10
|
3
|
63
|
1000
|
|
27
|
4
|
6
|
3
|
63
|
1000
|
|
28
|
4
|
6
|
3
|
63
|
1000
|
|
29
|
4
|
6
|
3
|
63
|
1000
|
|
30
|
4
|
6
|
3
|
63
|
1000
|
|
31
|
6
|
1
|
3
|
63
|
1000
|
|
32
|
6
|
1
|
3
|
63
|
1000
|
|
33
|
4
|
10
|
3
|
63
|
1000
|
|
34
|
5
|
6
|
3
|
63
|
1000
|
|
35
|
5
|
6
|
3
|
63
|
1000
|
|
36
|
5
|
6
|
3
|
63
|
1000
|
|
37
|
5
|
6
|
3
|
63
|
1000
|
|
38
|
5
|
6
|
3
|
63
|
975
|
|
39
|
3
|
12
|
3
|
63
|
950
|
|
40
|
3
|
12
|
3
|
63
|
925
|
|
41
|
3
|
12
|
3
|
63
|
900
|
|
42
|
3
|
12
|
3
|
63
|
875
|
|
43
|
3
|
12
|
3
|
63
|
850
|
|
44
|
3
|
12
|
3
|
63
|
850
|
|
45
|
3
|
12
|
3
|
63
|
825
|
|
46
|
3
|
12
|
3
|
63
|
800
|
|
47
|
3
|
12
|
3
|
63
|
775
|
|
48
|
3
|
12
|
3
|
63
|
775
|
|
49
|
3
|
12
|
3
|
63
|
750
|
|
50
|
3
|
12
|
3
|
63
|
750
|
|
51
|
3
|
2
|
3
|
63
|
725
|
|
52
|
3
|
2
|
3
|
63
|
700
|
|
53
|
3
|
2
|
3
|
63
|
700
|
|
54
|
3
|
2
|
3
|
63
|
675
|
|
55
|
3
|
2
|
3
|
63
|
675
|
|
56
|
3
|
2
|
3
|
63
|
650
|
|
57
|
3
|
2
|
3
|
63
|
650
|
|
58
|
3
|
2
|
3
|
63
|
625
|
|
59
|
3
|
2
|
3
|
63
|
625
|
|
60
|
3
|
2
|
3
|
63
|
625
|
|
61 to 82
|
3
|
2
|
3
|
63
|
600
|
|
83 to 102
|
4
|
2
|
3
|
63
|
600
|
|
103
|
5
|
2
|
3
|
63
|
600
|
|
104
|
5
|
2
|
3
|
63
|
600
|
|
105
|
5
|
2
|
3
|
63
|
600
|
|
106
|
5
|
2
|
3
|
63
|
600
|
|
107 to 125
|
3
|
4
|
3
|
63
|
600
|
The following table summarizes the PLL programming values when the PLL is in fractional mode.
Table 37-2: PLL Programming Data for Fractional Feedback Divider Values
|
FBDIV
|
CP
|
RES
|
LFHF
|
LOCK_DLY
|
LOCK_CNT
|
|
25
|
3
|
5
|
3
|
63
|
1000
|
|
26
|
3
|
5
|
3
|
63
|
1000
|
|
27
|
3
|
9
|
3
|
63
|
1000
|
|
28
|
3
|
9
|
3
|
63
|
1000
|
|
29
|
3
|
9
|
3
|
63
|
1000
|
|
30
|
3
|
9
|
3
|
63
|
1000
|
|
31
|
3
|
14
|
3
|
63
|
1000
|
|
32
|
3
|
14
|
3
|
63
|
1000
|
|
33
|
3
|
14
|
3
|
63
|
1000
|
|
34
|
3
|
14
|
3
|
63
|
1000
|
|
35
|
3
|
14
|
3
|
63
|
1000
|
|
36
|
3
|
14
|
3
|
63
|
1000
|
|
37
|
3
|
14
|
3
|
63
|
1000
|
|
38
|
3
|
14
|
3
|
63
|
975
|
|
39
|
3
|
14
|
3
|
63
|
950
|
|
40
|
3
|
14
|
3
|
63
|
925
|
|
41
|
3
|
1
|
3
|
63
|
900
|
|
42
|
3
|
1
|
3
|
63
|
875
|
|
43
|
3
|
1
|
3
|
63
|
850
|
|
44
|
3
|
1
|
3
|
63
|
850
|
|
45
|
3
|
1
|
3
|
63
|
825
|
|
46
|
3
|
1
|
3
|
63
|
800
|
|
47
|
3
|
1
|
3
|
63
|
775
|
|
48
|
3
|
6
|
3
|
63
|
775
|
|
49
|
3
|
6
|
3
|
63
|
750
|
|
50
|
3
|
6
|
3
|
63
|
750
|
|
51
|
3
|
6
|
3
|
63
|
725
|
|
52
|
3
|
6
|
3
|
63
|
700
|
|
53
|
3
|
6
|
3
|
63
|
700
|
|
54
|
3
|
6
|
3
|
63
|
675
|
|
55
|
3
|
6
|
3
|
63
|
675
|
|
56
|
3
|
6
|
3
|
63
|
650
|
|
57
|
3
|
6
|
3
|
63
|
650
|
|
58
|
3
|
6
|
3
|
63
|
625
|
|
59
|
3
|
6
|
3
|
63
|
625
|
|
60
|
3
|
6
|
3
|
63
|
625
|
|
61
|
3
|
6
|
3
|
63
|
600
|
|
62
|
3
|
6
|
3
|
63
|
600
|
|
63
|
3
|
6
|
3
|
63
|
600
|
|
64
|
3
|
6
|
3
|
63
|
600
|
|
65
|
3
|
6
|
3
|
63
|
600
|
|
66
|
3
|
10
|
3
|
63
|
600
|
|
67
|
3
|
10
|
3
|
63
|
600
|
|
68
|
3
|
10
|
3
|
63
|
600
|
|
69
|
3
|
10
|
3
|
63
|
600
|
|
70
|
3
|
10
|
3
|
63
|
600
|
|
71
|
3
|
10
|
3
|
63
|
600
|
|
72
|
3
|
10
|
3
|
63
|
600
|
|
73
|
3
|
10
|
3
|
63
|
600
|
|
74
|
3
|
10
|
3
|
63
|
600
|
|
75
|
3
|
10
|
3
|
63
|
600
|
|
76
|
3
|
10
|
3
|
63
|
600
|
|
77
|
3
|
10
|
3
|
63
|
600
|
|
78
|
3
|
10
|
3
|
63
|
600
|
|
79
|
3
|
10
|
3
|
63
|
600
|
|
80
|
3
|
10
|
3
|
63
|
600
|
|
81
|
3
|
10
|
3
|
63
|
600
|
|
82
|
3
|
6
|
3
|
63
|
600
|
|
83
|
3
|
6
|
3
|
63
|
600
|
|
84
|
3
|
6
|
3
|
63
|
600
|
|
85
|
3
|
6
|
3
|
63
|
600
|
|
86
|
3
|
6
|
3
|
63
|
600
|
|
87
|
3
|
6
|
3
|
63
|
600
|
|
88
|
3
|
12
|
3
|
63
|
600
|
|
89
|
3
|
12
|
3
|
63
|
600
|
|
90
|
3
|
12
|
3
|
63
|
600
|
|
91
|
3
|
12
|
3
|
63
|
600
|
|
92
|
3
|
12
|
3
|
63
|
600
|
|
93
|
3
|
12
|
3
|
63
|
600
|
|
94
|
3
|
12
|
3
|
63
|
600
|
|
95
|
3
|
12
|
3
|
63
|
600
|
|
96
|
3
|
12
|
3
|
63
|
600
|
|
97
|
3
|
12
|
3
|
63
|
600
|
|
98
|
3
|
12
|
3
|
63
|
600
|
|
99
|
3
|
12
|
3
|
63
|
600
|
|
100
|
3
|
12
|
3
|
63
|
600
|
|
101
|
3
|
12
|
3
|
63
|
600
|
|
102
|
3
|
12
|
3
|
63
|
600
|
|
103
|
3
|
12
|
3
|
63
|
600
|
|
104
|
3
|
12
|
3
|
63
|
600
|
|
105
|
3
|
12
|
3
|
63
|
600
|
|
106
|
3
|
12
|
3
|
63
|
600
|
|
107
|
3
|
12
|
3
|
63
|
600
|
|
108
|
3
|
12
|
3
|
63
|
600
|
|
109
|
3
|
12
|
3
|
63
|
600
|
|
110
|
3
|
12
|
3
|
63
|
600
|
|
111
|
3
|
12
|
3
|
63
|
600
|
|
112
|
3
|
12
|
3
|
63
|
600
|
|
113
|
3
|
12
|
3
|
63
|
600
|
|
114
|
3
|
12
|
3
|
63
|
600
|
|
115
|
3
|
12
|
3
|
63
|
600
|
|
116
|
3
|
12
|
3
|
63
|
600
|
|
117
|
3
|
12
|
3
|
63
|
600
|
|
118
|
3
|
12
|
3
|
63
|
600
|
|
119
|
3
|
12
|
3
|
63
|
600
|
|
120
|
3
|
12
|
3
|
63
|
600
|
|
121
|
3
|
12
|
3
|
63
|
600
|
|
122
|
3
|
12
|
3
|
63
|
600
|
|
123
|
3
|
12
|
3
|
63
|
600
|
|
124
|
3
|
12
|
3
|
63
|
600
|
|
125
|
3
|
12
|
3
|
63
|
600
|